Latin American and Caribbean Consortium of Engineering Institutions
Conference Track: Engineering
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Tutorial
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Keywords:
VHDL, Verilog, VLSI, ASIC
Contact Title: Dr.
Contact First Name: Subbarao
Contact Last Name: Wunnava
University:
Florida International University
Web:
www.fiu.edu/~eng
Position:
Professor of Electrical & Computer Engineering
Country:
USA
Email:
subbarao@fiu.edu
Fax:
01 (305) 348 3707
Paper Title:
Tutorial on VHDL and Verilog and Applications
Abstract:
Tutorial 1 on VHDL and
Applications
Tutorial 2 on Verilog
and Applications
Subbarao V. Wunnava Ph.D., P.E Professor
Jaime M. Montenegro, MSEE, Research Associate
Electrical and Computer Engineering, Florida International
University
10555 W.Flagler Street, Miami, FL 33174
Ph (305) 348 3018; Fax (305) 348 3707; email: subbarao@fiu.edu
(Submitted to : LACCEI: January
30, 2004)
Tutorial Objectives
The primary objective of these two back to back
Tutorials is to expose the participants to the concepts and
capabilities of VHDL (Very High Speed Integrated Circuit Hardware
Description Language), and Verilog, and
present practical case studies with proper functional simulations.
These tutorials will enable the participants to use the VHDL and
Verilog platforms immediately,
and efficiently. Another
equally important objective will be to provide an insight about comparing
both the VHDL and Verilog platforms, for proper understanding and
adoption.
Brief Description
In the present times, the programmable digital
devices such as the CPLDs (Complex Programmable Logic Devices), FPGAs
(Field Programmable Gate Arrays), and ASICs (Application Specific
Integrated Circuits) have become very reliable, and cost effective.
The gate densities of these devices have exceeded 10,000 gates, and
a complex digital system requiring several digital devices and printed
circuit boards can be
accommodated in one or two of the CPLDs or FPGAs.
VHDL and Verilog are
the front running software
and digital design platforms, well suited for the CPLD or the FPGA based
realizations. In these two
back to back tutorias, the authors will introduce the essentials
and programming methodologies of VHDL and Verilog.
Case studies will be presented for the essential digital units such
as Logic Gates, Multiplexers, decoders, Flip-Flops, Counters, Shift
Registers, ALUs (Arithmetic Logic Units),
etc. with actual
functional programs written in VHDL.
Also, the synthes!
is of these designs will be carried out with
the industry standard CPLDs and FPGAs.
Proper simulations of these digital systems will be presented, for
functional accuracies and timing analysis.
Intended audience
These tutorials are meant for engineers and scientists, who are
interested in learning about the essentials of the VHDL and Verilog
languages, and start writing functional programs in these languages, for
the needed digital system designs. Some
knowledge of Digital Logic and exposure to some type of Programming
Language is needed from the part of the participants.
The course notes and the presentation material will be provided.
Same digital components, subsystems and systems will be used in
both the VHDL and Verilog Tutorials.
The authors believe that such a strategy will not only provide the
audience with the capabilities of each language, but also will help them
formulate an objective evaluation scheme about both the languages, and
their relative merits and demerits in the digital system designs.
The Authors
The principal author will be Dr.
Subbarao V. Wunnava, Professor of Electrical & Computer Engineering,
at Florida International University, with more than 25 years of teaching,
research, and industrial experience.
He has 4 books to his credit and several articles and tutorials in
journals and conferences. His
brief resume is enclosed herewith.
The co-author is Mr. Jaime Montenegro,
who has obtained his MSEE and is currently working on his Ph.D in the
Department of Electrical and Computer Engineering. He is specializing in VLSI designs including VHDL and Verilog.
Topics of Tutorial 1: VHDL and Applications (04.00 Hours)
1. General
considerations of Hardware Description Language
2. The
VHDL as a software programming tool
3. The
syntax of the VHDL language
4. Case
studies of combinational logic with VHDL (with functional programs and
simulations, and analysis)
a. Logic
Gates
b. Multiplexers
c. Decoders
d. Arithmetic
Logic Units
e. Drivers
and bus units
5. Case
studies with sequential logic with VHDL (with functional programs and
simulations, and analysis)
a. Flip
Flops
b. Counters
(4 bit, 8 bit, 16 bit..)
c. Shift
Resisters (4 bit, 8 bit, 16 bit..)
d. Memory
units
e. Timing
and clocking units
6. Design
of Digital Sub systems, analysis and timing
7. Integration
of the sub systems into functional digital systems
8. Appendix
a. VHDL
compilers
b. CPLDs
and FPGAs
c. Design
tools and platforms
Topics of Tutorial 2: Verilog
and Applications (04.00
Hours)
1. General
considerations of Hardware Description Language
2. The
Verilog as a software programming tool
3. The
syntax of the Verilog language
4. Case
studies of combinational logic with Verilog (with functional programs and
simulations, and analysis)
a. Logic
Gates
b. Multiplexers
c. Decoders
d. Arithmetic
Logic Units
e. Drivers
and bus units
5. Case
studies with sequential logic with Verilog (with functional programs and
simulations, and analysis)
a. Flip
Flops
b. Counters
(4 bit, 8 bit, 16 bit..)
c. Shift
Resisters (4 bit, 8 bit, 16 bit..)
d. Memory
units
e. Timing
and clocking units
6. Design
of Digital Sub systems, analysis and timing
7. Integration
of the sub systems into functional digital systems
8. Appendix
a. Verilog
compilers
b. CPLDs
and FPGAs
c. Design
tools and platforms
Mailing Address:
Electrical & Computer Engineering
Florida Internaional University
10555 W. Flagler Street
Miami, FL 33174, USA
Phone:
Authors:
Subbarao V. Wunnava, ECE Dept, FIU
subbarao@fiu.edu
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